LTC3586-1 [Linear Systems]
7-Channel Confi gurable High Power PMIC; 7通道的配可配置高功率PMIC
| 型号： | LTC3586-1 |
| 厂家： | 
Linear Systems |
| 描述： | 7-Channel Confi gurable High Power PMIC |
| 文件： | 总38页 (文件大小：417K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3675
7-Channel Configurable
High Power PMIC
FEATURES
DESCRIPTION
n
Four Monolithic Synchronous Buck DC/DCs
The LTC®3675 is a digitally programmable high efficiency
multioutput power supply plus dual string LED driver IC
optimizedforhighpowersinglecellLi-Ion/Polymerapplica-
tions. The DC/DCs consist of four synchronous buck con-
verters (1A/1A/500mA/500mA), one synchronous boost
DC/DC (1A), and one buck-boost DC/DC (1A) all powered
from a 2.7V to 5.5V input. The 40V LED driver can regulate
up to 25mA of current through two LED strings with up to
10 LEDs each. The LED driver may also be configured as
a general purpose high voltage boost converter.
(1A/1A/500mA/500mA)
n
Buck DC/DCs Can Be Paralleled to Deliver Up to
2× Current with a Single Inductor
n
Independent 1A Boost and 1A Buck-Boost DC/DCs
2
n
Dual String I C Controlled 40V LED Driver
2
n
I C Programmable Output Voltage, Operating
Mode, and Switch Node Slew Rate for All DC/DCs
2
2
n
n
I C Read Back of DC/DC, LED Driver, Fault Status
I C Programmable V and Die Temperature
IN
Warnings
DC/DC enables, output voltages, switch slew rates and
operating modes may all be independently programmed
n
Maskable Interrupts to Report DC/DC, V and Die
IN
2
Temperature Faults
over I C or used in standalone mode via simple I/O and
n
n
n
n
Pushbutton ON/OFF/RESET
power-up defaults. The buck DC/DCs may be used inde-
pendently or paralleled to achieve higher output currents
withasharedinductor.LEDenable,60dBbrightnesscontrol
Always-On 25mA LDO
Low Quiescent Current: 16μA (All DC/DCs Off)
4mm × 7mm × 0.75mm 44-Lead QFN Package
2
and up/down gradation are programmed using I C. Alarm
levels for low V and high die temperature may also be
IN
2
programmed via I C with a maskable interrupt output to
APPLICATIONS
monitor DC/DC and system faults.
n
High Power (5W to 10W) Single Cell Li-Ion/Polymer
Applications
Pushbutton ON/OFF/RESET control and a power-on reset
output provide flexible and reliable power-up sequenc-
ing. The LTC3675 is available in a low profile (0.75mm),
thermally enhanced 44-lead 4mm × 7mm QFN package.
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks of
Linear Technology Corporation and Hot Swap is a trademark of Linear Technology Corporation. All
other trademarks are the property of their respective owners.
n
Portable Industrial Applications, Handy Terminals,
Portable Instruments
Multioutput Low Voltage Power Supplies
n
TYPICAL APPLICATION
SW1
SW2
0.425V TO V , 1A MAX
IN
2.7V TO 5.5V
V
IN
0.425V TO V , 1A MAX
IN
SW3
0.425V TO V , 500mA MAX
IN
0.425V TO V , 500mA MAX
3
2
I C
SW4
SW5
IN
LTC3675
EN1
V
IN
V
IN
EN2
VOUT5
SWAB6
SWCD6
VOUT6
TO 5.35V, 1A MAX
EN3
DIGITAL
CONTROL
EN4
ENBB
IRQB
RSTB
WAKE
PBSTAT
2.65V TO 5.25V, 1A MAX
0.8V TO V , 25mA MAX
LDO_OUT
IN
V
IN
SW7
ONB
PUSH BUTTON
•
•
•
•
•
•
CT
LED1
LED2
0.01μF
EXPOSED PAD
UP TO 10 LEDS
PER STRING
3675 TA01
3675fa
1
LTC3675
TABLE OF CONTENTS
Features............................................................................................................................ 1
Applications ....................................................................................................................... 1
Typical Application ............................................................................................................... 1
Description......................................................................................................................... 1
Absolute Maximum Ratings..................................................................................................... 3
Order Information................................................................................................................. 3
Pin Configuration ................................................................................................................. 3
Electrical Characteristics........................................................................................................ 4
Typical Performance Characteristics .......................................................................................... 8
Pin Functions.....................................................................................................................14
Block Diagram....................................................................................................................16
Operation..........................................................................................................................17
Buck Switching Regulator .................................................................................................................................... 17
Buck Regulators with Combined Power Stages.................................................................................................... 17
Boost Switching Regulator ................................................................................................................................... 18
Buck-Boost Switching Regulator .......................................................................................................................... 18
LED Driver ............................................................................................................................................................ 18
Pushbutton Interface and Power-Up Power-Down Sequencing ............................................................................ 19
Power-Up and Power-Down via Pushbutton ......................................................................................................... 19
2
Power-Up and Power-Down via Enable Pin or I C................................................................................................. 21
LED Current Programming ................................................................................................................................... 21
2
I C Interface.......................................................................................................................................................... 21
Error Condition Reporting via RSTB and IRQB Pins ............................................................................................. 24
Undervoltage and Overtemperature Functionality................................................................................................. 25
Applications Information .......................................................................................................26
Switching Regulator Output Voltage and Feedback Network................................................................................. 26
Buck Regulators ................................................................................................................................................... 26
Combined Buck Regulators .................................................................................................................................. 26
Boost Regulator.................................................................................................................................................... 27
Buck-Boost Regulator........................................................................................................................................... 28
LED Driver ............................................................................................................................................................ 28
Operating the LED Driver As a High Voltage Boost Regulator............................................................................... 29
Input and Output Decoupling Capacitor Selection................................................................................................. 29
Choosing the C Capacitor ................................................................................................................................... 30
T
Programming the UVOT Register ......................................................................................................................... 30
Programming the RSTB and IRQB Mask Registers .............................................................................................. 30
Status Byte Read Back ......................................................................................................................................... 31
PCB Considerations.............................................................................................................................................. 31
Typical Applications.............................................................................................................33
Package Description ............................................................................................................36
Revision History .................................................................................................................37
Typical Application ..............................................................................................................38
Related Parts.....................................................................................................................38
3675fa
2
LTC3675
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V , V
, V
, FB1-6, LED_OV, EN1-4, ENBB, LED_
IN OUT5 OUT6
FS, CT, WAKE, PBSTAT, IRQB, RSTB, ONB, DV ,
CC
SW5.............................................–0.3V to 6V (Static)
LDO_OUT, LDOFB...–0.3V to Lesser of (V + 0.3V) or 6V
IN
CC
EN1 1
FB1 2
FB2 3
EN2 4
SW1 5
37 ENBB
36 FB6
35 FB5
SCL, SDA .......... –0.3V to Lesser of (DV + 0.3V) or 6V
SW1, SW2, SW3, SW4, SWAB6
34 V
33 V
IN
............................. –0.3V to Lesser of (V + 0.3V) or 6V
OUT5
IN
OUT6
V
V
6
7
32 SW5
31 V
IN
SWCD6 ............–0.3V to Lesser of (V
+ 0.3V) or 6V
45
IN
IN
GND
SW2 8
SW3 9
30 LDO_OUT
29 LDOFB
28 ONB
27 LED_FS
26 WAKE
25 PBSTAT
24 IRQB
SW7........................................................... –0.3V to 45V
I
I
I
I
, I
................................................................1.4A
............................................................700mA
V
10
SW1 SW2
IN
SW4 11
EN3 12
EN4 13
FB4 14
FB3 15
, I
SW3 SW4
, I
, I
................................................2.4A
SW5 SWAB6 SWCD6
............................................................................2A
SW7
23 RSTB
Operating Junction Temperature Range (Notes 2, 3)
............................................................... –40°C to 125°C
Storage Temperature Range .................. –65°C to 125°C
UFF PACKAGE
44-LEAD (7mm s 4mm) PLASTIC QFN
T
= 125°C, θ = 45°C/W
JA
JMAX
EXPOSED PAD (PIN 45) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
44-Lead (7mm × 4mm) Plastic QFN
TEMPERATURE RANGE
–40°C to 125°C
LTC3675EUFF#PBF
LTC3675EUFF#TRPBF
3675
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3675fa
3
LTC3675
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
2.7
TYP
MAX
5.5
UNITS
l
l
l
V
V
V
V
Input Supply Range
V
V
IN
Falling Undervoltage Threshold
Rising Undervoltage Threshold
Falling Undervoltage Warning Threshold
2.35
2.45
2.45
2.55
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
50
2.55
2.65
IN_FALLING
IN_RISING
IN_WARN
V
UV[2], UV[1], UV[0] = 000
UV[2], UV[1], UV[0] = 001
UV[2], UV[1], UV[0] = 010
UV[2], UV[1], UV[0] = 011
UV[2], UV[1], UV[0] = 100
UV[2], UV[1], UV[0] = 101
UV[2], UV[1], UV[0] = 110
UV[2], UV[1], UV[0] = 111
V
V
V
V
V
V
V
V
V
V
V
IN
Undervoltage Warning Hysteresis
mV
mV
°C
IN_HYS
l
Undervoltage Warning Threshold Step Size
Overtemperature Shutdown
85
100
150
115
28
IN_WARN(LSB)
OT
OT_WARN
Overtemperature Warning Threshold; Die
Temperature Below OT that Causes IRQB = 0 OT[1], OT[0] = 01
OT[1], OT[0] = 00
10
20
30
40
°C
°C
°C
°C
OT[1], OT[0] = 10
OT[1], OT[0] = 11
I
f
Input Supply Current
All Switching Regulators and LED Driver
in Shutdown, ONB = HIGH; Sum of All V
Currents
16
μA
VIN_ALLOFF
IN
l
l
Voltage Regulator Switching Frequency
Falling PGOOD Threshold Voltage
PGOOD Hysteresis
All Voltage Regulators
1.8
88
2.25
92
1
2.7
96
MHz
%
OSC
V
Full-Scale (1,1,1,1) Reference Voltage
All Regulators Except LED Driver
PGOOD(FALL)
PGOOD(HYS)
V
%
1A Buck Regulator (Buck Regulators 1 and 2)
I
Pulse-Skipping Input Current
V
V
= V = 0.85V (Notes 4, 5)
105
20
200
50
μA
μA
VIN1,2
FB1
FB1
FB2
Burst Mode® Operation Input Current
= V = 0.85V (Notes 4, 5)
FB2
I
PMOS Current Limit
(Note 6)
2.25
780
405
2.8
800
425
25
3.35
820
445
A
mV
mV
mV
nA
FWD1,2
l
l
V
V
V
Feedback Regulation Voltage
Feedback Regulation Voltage
FB1, FB2 Regulation Voltage Step Size
Feedback Leakage Current
Maximum Duty Cycle
Pulse-Skipping Mode Full-Scale (1,1,1,1)
Pulse-Skipping Mode Full-Scale (0,0,0,0)
FB1,2(HIGH)
FB1,2(LOW)
LSB1,2
I
V
V
= V = 0.85V
–50
100
50
FB12
FB1
FB2
l
D
R
R
= V = 0V
FB1
%
MAX1,2
PMOS1,2
NMOS1,2
LEAKP1,2
LEAKN1,2
FB2
PMOS On-Resistance
I
I
= I
= I
= 100mA
265
280
mΩ
mΩ
μA
SW1
SW1
SW2
SW2
NMOS On-Resistance
= –100mA
I
I
PMOS Leakage Current
EN1 = EN2 = 0
EN1 = EN2 = 0
–2
–2
2
2
NMOS Leakage Current
μA
2
R
Output Pull-Down Resistance in Shutdown
Soft-Start Time
EN1 = EN2 = 0 (I C Bit Set)
10
kΩ
μs
SWPD1,2
t
500
SS1,2
500mA Buck Regulator (Buck Regulators 3 and 4)
I
Pulse-Skipping Input Current
Burst Mode Operation Input Current
V
V
= V = 0.85V (Notes 4, 5)
105
20
200
50
μA
μA
VIN3,4
FB3
FB3
FB4
= V = 0.85V (Notes 4, 5)
FB4
I
PMOS Current Limit
(Note 6)
0.75
1.2
1.65
A
FWD3,4
3675fa
4
LTC3675
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
780
405
TYP
800
425
25
MAX
820
445
UNITS
mV
mV
mV
nA
l
l
V
V
V
Feedback Regulation Voltage
Feedback Regulation Voltage
FB3, FB4 Regulation Voltage Step Size
Feedback Leakage Current
Maximum Duty Cycle
Pulse-Skipping Mode Full-Scale (1,1,1,1)
Pulse-Skipping Mode Full-Scale (0,0,0,0)
FB3,4(HIGH)
FB3,4(LOW)
LSB3,4
I
V
V
= V = 0.85V
–50
100
50
FB3,4
FB3
FB4
l
D
R
R
= V = 0V
%
MAX3,4
PMOS3,4
NMOS3,4
LEAKP3,4
LEAKN3,4
FB3
FB4
PMOS On-Resistance
I
I
= I
= I
= 100mA
500
510
mꢀ
mꢀ
μA
SW3
SW3
SW4
SW4
NMOS On-Resistance
= –100mA
I
I
PMOS Leakage Current
NMOS Leakage Current
Output Pull-Down Resistance in Shutdown
Soft-Start Time
EN3 = EN4 = 0
EN3 = EN4 = 0
–1
–1
1
1
μA
2
R
EN3 = EN4 = 0 (I C Bit Set)
10
kꢀ
μs
SWPD3,4
SS3,4
t
500
Buck Regulators Combined
I
I
I
PMOS Current Limit
PMOS Current Limit
PMOS Current Limit
FB2 = V (Note 6)
5.6
4
A
A
A
FWD1+2
FWD2+3
FWD3+4
IN
FB3 = V (Note 6)
IN
FB4 = V (Note 6)
2.4
IN
1A Boost Regulator
I
PWM Mode
Burst Mode Operation
V
FB5
V
FB5
= 0.85V (Notes 4, 5)
= 0.85V (Notes 4, 5)
150
35
300
60
μA
μA
VIN5
V
Maximum Regulated Output Voltage
Forward Current Limit
5.35
2.5
5.55
3.15
800
425
25
5.75
3.9
V
A
OUT5(MAX)
I
(Note 6)
FWD5
l
l
V
V
V
Feedback Regulation Voltage
Feedback Regulation Voltage
FB5 Regulation Voltage Step Size
Feedback Leakage Current
Maximum Duty Cycle
PWM Mode Full-Scale (1,1,1,1)
PWM Mode Full-Scale (0,0,0,0)
780
405
820
445
mV
mV
mV
nA
FB5(HIGH)
FB5(LOW)
LSB5
I
V
FB5
= 0.85V
–50
50
FB5
DC
NMOS Switch
90
%
MAX5
PMOS5
NMOS5
LEAKP
R
R
PMOS On-Resistance
260
275
mꢀ
mꢀ
μA
NMOS On-Resistance
I
I
PMOS Switch Leakage Current
NMOS Switch Leakage Current
Output Pull-Down Resistance in Shutdown
Soft-Start Time
–2
–2
2
2
μA
LEAKN
R
Boost Regulator Off
10
kꢀ
μs
OUTPD5
t
500
SS5
1A Buck-Boost Regulator
I
PWM Mode
Burst Mode Operation
V
FB6
V
FB6
= 0.85V (Note 4, 5)
= 0.85V(Note 4, 5)
220
20
400
40
μA
μA
VIN6
V
V
Minimum Regulated Output Voltage
Maximum Regulated Output Voltage
Forward Current Limit
2.65
5.65
2.65
275
0
2.8
V
V
OUT6(LOW)
OUT6(HIGH)
FWD6
5.25
2.1
I
I
I
PWM Mode (Note 6)
3.2
350
30
A
Peak Current Limit
Burst Mode Operation (Note 6)
Burst Mode Operation
200
–30
780
405
mA
mA
mV
mV
mV
3675fa
PEAK6
ZERO6
Zero Current Limit
l
l
V
V
V
Feedback Regulation Voltage
Feedback Regulation Voltage
FB6 Regulation Voltage Step Size
PWM Mode Full-Scale (1,1,1,1)
PWM Mode Full-Scale (0,0,0,0)
800
425
25
820
445
FB6(HIGH)
FB6(LOW)
LSB6
5
LTC3675
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
= 0.85V
MIN
–50
100
TYP
MAX
UNITS
nA
I
Feedback Leakage Current
Maximum Buck Duty Cycle
Maximum Boost Duty Cycle
PMOS On-Resistance
V
FB6
50
FB6
l
DC6
DC6
Duty Cycle of PMOS Switch A
Duty Cycle of NMOS Switch C
Switches A and D
%
BUCK(MAX)
75
%
BOOST(MAX)
R
R
260
275
mΩ
mΩ
μA
PMOS6
NMOS On-Resistance
Switches B and C
NMOS6
LEAKP
LEAKN
SS
I
I
t
PMOS Switch Leakage Current
NMOS Switch Leakage Current
Soft-Start Time
–2
–2
2
2
μA
500
10
μs
R
Output Pull-Down Resistance in Shutdown
ENBB = 0
kꢀ
OUTPD6
LED Driver; R
= 20kΩ
LED_FS
I
Input Current (MODE0 = MODE1 = 0)
LED_OV = 0.85V (Notes 4, 5)
700
1000
μA
VIN7
l
l
V
LED Overvoltage Threshold
Feedback Voltage
Operating in LED Mode
Operating in Boost Mode
805
770
825
800
845
830
mV
mV
LED_OV
l
V
V
V
LED Full-Scale Voltage
775
800
300
825
mV
mV
V
LED_FS
LED Pin Regulation Voltage
LED Regulation Voltage Clamp
Maximum Current Limit
(Note 7)
(Note 6)
LED1,2
l
6.0
1.6
8.3
2.15
26.75
53.5
1
LED1,2_CLMP
LIM7
I
I
I
I
1.85
25.0
50
A
l
l
l
LED Full-Scale Current
23.25
46.5
mA
mA
%
LED_FS
LED Full Current High Current Mode
LED_2FS
LED1 and LED2 Current Matching at
Full-Scale
LED_MATCH
|ILED1 −ILED2
|
•100
I
LED1 +ILED2
⎛
⎞
⎜
⎟
2
⎝
⎠
I
LED Current LSB
98
μA
mꢀ
μA
LED_LSB
R
NMOS On-Resistance
NMOS Switch Leakage
Oscillator Frequency
Maximum Duty Cycle
300
NMOS7
I
V
= 5.5V
–1
1
LEAK_NMOS7
SW7
l
l
l
l
F
450
562.5
97
675
kHz
%
LEDOSC
DC
NMOS Switch
MAX7
25mA Always-On LDO
V
Feedback Regulation Voltage
Dropout Resistance
780
1.6
800
12
820
mV
ꢀ
LDOFB
R
DO
2
I C Port
DV
Input Supply Voltage
Input Supply Current
5.5
1
V
μA
V
CC
I
SCL/SDA= 0kHz
0.3
1
DVCC
DV
DV UVLO
CC_UVLO
CC
2
ADDRESS
LTC3675 I C Address
0001001[R/WB]
V
V
Input High Voltage
SDA/SCL
SDA/SCL
SDA/SCL
SDA/SCL
70
30
0
%DV
%DV
IH
IL
CC
Input Low Voltage
CC
I
I
Input High Current
–1
–1
1
1
μA
μA
V
IH
IL
Input Low Current
0
V
SDA Output Low Voltage
Clock Operating Frequency
I
= 3mA
0.4
400
OL_SDA
SDA
f
kHz
SCL
3675fa
6
LTC3675
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t
Bus Free Time Between Stop and Start
Condition
1.3
μs
BUF
t
t
t
t
t
t
t
t
t
t
t
Hold Time After Repeated Start Condition
Repeated Start Condition Set-Up Time
Stop Condition Set-Up Time
Data Hold Time Output
0.6
0.6
μs
μs
μs
ns
ns
ns
μs
μs
ns
ns
ns
HD_SDA
SU_STA
SU_STO
HD_DAT(O)
HD_DAT(I)
SU_DAT
LOW
0.6
0
900
Data Hold Time Input
0
Data Set-Up Time
100
SCL Clock Low Period
1.3
SCL Clock High Period
0.6
HIGH
Clock/Data Fall Time
C = Capacitance of One Bus Line (pF)
20+0.1C
20+0.1C
300
300
50
f
B
B
B
Clock/Data Rise Time
C = Capacitance of One Bus Line (pF)
B
r
Input Spike Suppression Pulse Width
SP
Interface Logic Pins (PBSTAT, WAKE, RSTB, IRQB, ONB)
I
Output High Leakage Current
Output Low Voltage
3.6V at Pin
–1
1
μA
mV
mV
mV
LK(HIGH)
V
V
V
3mA into Pin
100
800
700
400
1200
OL
ONB High Threshold
ONB Low Threshold
ONB(HIGH)
ONB(LOW)
400
400
Interface Logic Pins (EN1, EN2, EN3, EN4, ENBB)
l
l
V
V
V
Enable Rising Threshold
Enable Falling Hysteresis
Enable Rising Threshold
Enable Pin Leakage Current
All Regulators and LED Driver Disabled
650
60
1200
mV
mV
mV
μA
HI_ALLOFF
EN_HYS
HI
At Least One Regulator/LED Driver Enabled
EN = 3.6V
380
–1
400
420
1
I
EN
Pushbutton Parameters; CT = 0.01μF
t
t
t
t
ONB Low Time to PBSTAT Low
ONB Low Time to WAKE High
ONB Low to Hard Reset
WAKE High
28
280
3.5
0.7
50
400
5
72
520
6.5
1.3
ms
ms
sec
sec
ONB_LO
ONB_WAKE
ONB_HR
HR
Time for Which All Enabled Regulators are
Disabled
1
t
t
PBSTAT Minimum Pulse Width
WAKE High Time
28
50
5
72
ms
sec
PBSTAT_PW
3.5
6.5
WAKE_ON
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: Static current, switches not switching. Actual current may be
higher due to gate charge losses at the switching frequency.
Note 5: Currents measured at a specific V pin. Buck 1 (V , Pin 6);
IN
IN
Buck 2 (V , Pin 7); Buck 3 and Buck 4 (V , Pin 10); Boost and Buck
IN
IN
Note 2: The LTC3675 is tested under pulsed load conditions such that
Boost (V , Pin 34); LED driver (V , Pin 31).
IN IN
T ≈ T . The LTC3675 is guaranteed to meet performance specifications
A
J
Note 6: The current limit features of this part are intended to protect the
IC from short term or intermittent fault conditions. Continuous operation
above the maximum specified pin current rating may result in device
degradation over time.
from 0°C to 125°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: The LTC3675 includes overtemperature protection which protects
the device during momentary overload conditions. Junction temperature
will exceed 125°C when overtemperature protection is active. Continuous
operation above the specified maximum operating junction temperature
may impair device reliability.
Note 7: With dual string operation, the LED pin with the lower voltage sets
the regulation point.
3675fa
7
LTC3675
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Undervoltage Threshold
vs Temperature
Input Supply Current
vs Temperature
Oscillator Frequency
vs Temperature
2.50
50
45
40
35
30
25
20
15
10
5
2.70
2.65
2.60
2.55
2.50
2.45
2.40
2.35
2.30
ALL REGULATORS AND LED
DRIVER IN SHUTDOWN
2.45
2.40
2.35
V
IN_RISING
V
V
= 5.5V
= 2.7V
IN
IN
2.30
2.25
2.20
2.15
2.10
2.05
2.00
V
= 3.6V
IN
V
= 5.5V
IN
V
= 3.6V
IN
V
IN_FALLING
V
= 2.7V
IN
0
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3675 G02
3675 G03
3675 G01
Enable Pin Precision Threshold
vs Temperature
1A Buck Regulators,
Efficiency vs Load
Enable Threshold vs Temperature
420
415
410
405
400
395
390
385
380
900
850
800
750
700
650
600
550
500
450
400
100
90
80
70
60
50
40
30
20
10
0
THRESHOLD MEASURED WITH A
V
= 1.2V
ALL REGULATORS AND LED
OUT
REGULATOR ENABLED, V = 3.6V
DRIVER DISABLED, V = 3.6V
IN
IN
EN RISING
EN RISING
EN FALLING
V
V
V
V
V
V
= 2.7V Burst Mode OPERATION
IN
IN
IN
IN
IN
IN
= 3.6V Burst Mode OPERATION
= 5.5V Burst Mode OPERATION
= 2.7V PULSE SKIPPING-MODE
= 3.6V PULSE SKIPPING-MODE
= 5.5V PULSE SKIPPING-MODE
EN FALLING
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
1
10
100
1000
TEMPERATURE (°C)
TEMPERATURE (°C)
LOAD CURRENT (mA)
3675 G05
3675 G04
3675 G06
1A Buck Regulators,
Efficiency vs Load
1A Buck Regulators,
Load Regulation
1A Buck Regulators,
Line Regulation
1.220
1.216
1.212
1.208
1.204
1.200
1.196
1.192
1.188
1.184
1.180
1.220
1.216
1.212
1.208
1.204
1.200
1.196
1.192
1.188
1.184
1.180
100
90
80
70
60
50
40
30
20
10
0
PULSE-SKIPPING MODE
PULSE-SKIPPING MODE
LOAD = 500mA
V
= 5.5V
IN
V
= 2.7V
IN
V
= 2.5V
OUT
V
= 3.6V
LOAD = 100mA
IN
V
V
V
V
V
V
= 2.7V Burst Mode OPERATION
IN
IN
IN
IN
IN
IN
= 3.6V Burst Mode OPERATION
= 5.5V Burst Mode OPERATION
= 2.7V PULSE SKIPPING-MODE
= 3.6V PULSE SKIPPING-MODE
= 5.5V PULSE SKIPPING-MODE
1
10
100
1000
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
(V)
1
10
100
1000
LOAD CURRENT (mA)
V
LOAD CURRENT (mA)
IN
3675 G08
3675 G09
3675 G06
3675fa
8
LTC3675
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
1A Buck Regulators, No Load
1A Buck Regulators, Transient
Response (Pulse-Skipping Mode)
1A Buck Regulators, Transient
Response (Burst Mode Operation)
Start-Up Transient
(Pulse-Skipping Mode)
V
= 3.6V
IN
V
V
OUT1
OUT1
100mV/DIV
100mV/DIV
AC-COUPLED
AC-COUPLED
V
OUT1
500mV/DIV
INDUCTOR
CURRENT
200mA/DIV
INDUCTOR
CURRENT
500mA/DIV
INDUCTOR
CURRENT
200mA/DIV
0mA
EN1
2V/DIV
0mA
3675 G10
3675 G12
3675 G11
50μs/DIV
25μs/DIV
50μs/DIV
LOAD STEP = 100mA TO 700mA
LOAD STEP = 100mA TO 700mA
V
= 3.6V, V
= 1.2V
V
= 3.6V, V
= 1.2V
IN
OUT1
IN
OUT1
1A Buck Regulators,
VOUT1 vs Temperature
1A Buck Regulators, PMOS
Current Limit vs Temperature
1A Buck Regulators, Switch
RDSON vs Temperature
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.25
1.24
1.23
1.22
1.21
1.20
1.19
1.18
1.17
1.16
1.15
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
PULSE-SKIPPING MODE
LOAD = 500mA
PMOS R
, V = 2.7V
DSON IN
V
= 5.5V
IN
NMOS R , V = 2.7V
DSON IN
V
= 2.7V
IN
V
= 3.6V
IN
V
= 2.7V
IN
V
= 5.5V
IN
V
= 3.6V
IN
NMOS R , V = 5.5V
DSON IN
PMOS R
, V = 5.5V
DSON IN
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3675 G14
3675 G13
3675 G15
500mA Buck Regulators,
Efficiency vs Load
500mA Buck Regulators,
Load Regulation
500mA Buck Regulators,
Line Regulation
1.830
1.825
1.820
1.815
1.810
1.805
1.800
1.795
1.790
1.785
1.780
1.775
1.770
100
90
80
70
60
50
40
30
20
10
0
1.830
1.825
1.820
1.815
1.810
1.805
1.800
1.795
1.790
1.785
1.780
1.775
1.770
PULSE-SKIPPING MODE
PULSE-SKIPPING MODE
V
= 3.6V
IN
LOAD = 250mA
LOAD = 50mA
V
= 5.5V
IN
V
= 1.8V
V
= 2.7V
IN
OUT3
V
V
V
V
V
V
= 2.7V Burst Mode OPERATION
= 3.6V Burst Mode OPERATION
= 5.5V Burst Mode OPERATION
= 2.7V PULSE SKIPPING-MODE
= 3.6V PULSE SKIPPING-MODE
= 5.5V PULSE SKIPPING-MODE
IN
IN
IN
IN
IN
IN
1
10
100
1000
1
10
100
1000
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
(V)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
V
IN
3675 G17
3675 G16
3675 G18
3675fa
9
LTC3675
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
500mA Buck Regulators No Load
500mA Buck Regulators Transient
Response (Pulse-Skipping Mode)
500mA Buck Regulators Transient
Response (Burst Mode Operation)
Start-Up Transient
(Pulse-Skipping Mode)
V
= 3.6V
IN
V
V
OUT3
OUT3
100mV/DIV
100mV/DIV
AC-COUPLED
AC-COUPLED
V
OUT3
500mV/DIV
INDUCTOR
CURRENT
500mA/DIV
INDUCTOR
CURRENT
100mA/DIV
INDUCTOR
CURRENT
100mA/DIV
EN
2V/DIV
3675 G21
3675 G20
3675 G19
25μs/DIV
50μs/DIV
50μs/DIV
LOAD STEP = 50mA to 300mA
LOAD STEP = 50mA to 300mA
V
= 3.6V, V
= 1.8V
V
= 3.6V, V
= 1.8V
IN
OUT3
IN
OUT3
500mA Buck Regulators,
VOUT3 vs Temperature
500mA Buck Regulators, PMOS
Current Limit vs Temperature
500mA Buck Regulators, Switch
RDSON vs Temperature
1.50
1.45
1.40
1.35
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
PULSE-SKIPPING MODE, LOAD = 250mA
PMOS R
, V = 2.7V
DSON IN
NMOS R
, V = 2.7V
DSON IN
V
= 5.5V
IN
V
= 5.5V
IN
V
= 3.6V
IN
NMOS R , V = 5.5V
DSON IN
V
= 2.7V
V
= 3.6V
IN
IN
V
= 2.7V
IN
PMOS R
, V = 5.5V
DSON IN
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3675 G23
3675 G24
3675 G22
Ganged Buck Regulators 1 and 2,
Efficiency vs Load
Boost Regulator,
Efficiency vs Load
Boost Regulator, Load Regulation
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
100
95
90
85
80
75
70
65
60
55
50
45
40
100
90
80
70
60
50
40
30
20
10
0
PWM MODE
V
= 3.6V, V
= 1.2V
OUT1
IN
V
= 4.2V
IN
V
= 3.6V
IN
Burst Mode OPERATION
PULSE-SKIPPING MODE
V
= 5V
OUT5
V
IN
= 2.7V
V
V
V
V
V
V
= 2.7V Burst Mode OPERATION
= 3.6V Burst Mode OPERATION
= 1.2V Burst Mode OPERATION
= 2.7V PWM MODE
IN
IN
IN
IN
IN
IN
= 3.6V PWM MODE
= 4.2V PWM MODE
1
10
100
1000
1
10
100
1000
10000
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3675 G27
3675 G25
3675 G26
3675fa
10
LTC3675
TYPICAL PERFORMANCE CHARACTERISTICS
Boost Regulator Transient
Response (PWM Mode)
Boost Regulator, Line Regulation
5.020
5.016
5.012
5.008
5.004
5.000
4.996
4.992
4.988
4.984
4.980
PWM MODE
V
OUT5
100mV/DIV
AC-COUPLED
LOAD = 500mA
LOAD = 100mA
INDUCTOR
CURRENT
200mA/DIV
3675 G29
200μs/DIV
LOAD STEP = 100mA to 600mA
V
= 3.6V, V
= 5V
IN
OUT5
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
(V)
V
IN
3675 G28
Boost Regulator Transient
Response (Burst Mode Operation)
Boost Regulator, No Load
Start-Up Transient, PWM Mode
V
= 3.6V
IN
V
OUT5
100mV/DIV
AC-COUPLED
V
OUT5
2V/DIV
INDUCTOR
CURRENT
500mA/DIV
INDUCTOR
CURRENT
500mA/DIV
0mA
3675 G31
3675 G30
50μs/DIV
50μs/DIV
LOAD STEP = 100mA to 600mA
V
= 3.6V, V
= 5V
IN
OUT5
Boost Regulator,
VOUT5 vs Temperature
Boost Regulator, Forward Current
Limit vs Temperature
5.10
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
3.50
3.45
3.40
3.35
3.30
3.25
3.20
3.15
3.10
3.05
3.00
2.95
2.90
2.85
2.80
PWM MODE, LOAD = 500mA
V
= 3.6V
IN
V
= 3.6V
V
IN
= 4.2V
IN
V
= 2.7V
IN
V
= 2.7V
IN
V
= 4.2V
IN
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
TEMPERATURE (°C)
3675 G32
3675 G33
3675fa
11
LTC3675
TYPICAL PERFORMANCE CHARACTERISTICS
Buck-Boost Regulator,
Load Regulation
Buck-Boost Regulator,
Efficiency vs Load
100
90
80
70
60
50
40
30
20
10
0
3.35
3.34
3.33
3.32
3.31
3.30
3.29
3.28
3.27
3.26
3.25
PWM MODE
V
= 3.6V
IN
V
= 2.7V
IN
V
= 4.2V
IN
V
= 5.5V
IN
V
= 2.7V
V
IN
= 3.6V
IN
Burst Mode OPERATION
PWM MODE
1
10
100
1000
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3675 G34
3675 G35
Buck-Boost Regulator Transient
Response (PWM Mode)
Buck-Boost Regulator,
Line Regulation
3.40
3.38
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22
3.20
PWM MODE
V
OUT6
200mV/DIV
AC-COUPLED
LOAD = 500mA
LOAD = 100mA
INDUCTOR
CURRENT
200mA/DIV
3675 G37
200μs/DIV
LOAD STEP = 100mA to 600mA
V
= 3.6V, V
= 3.3V
IN
OUT6
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
(V)
V
IN
3675 G36
Buck-Boost Regulator No Load
Start-Up (PWM Mode)
Buck-Boost Regulator, Reduction
in Load Current Deliverability
400
350
300
250
200
150
100
50
PWM MODE
V
= 3.6V
IN
V
= 3.3V
OUT6
V
OUT6
1V/DIV
INDUCTOR
CURRENT
500mA/DIV
EN6
2V/DIV
3675 G38
100μs/DIV
0
2.7
3
3.3
V
3.6
(V)
3.9
4.2
IN
3675 G39
3675fa
12
LTC3675
TYPICAL PERFORMANCE CHARACTERISTICS
Buck-Boost Regulator,
VOUT6 vs Temperature
Buck-Boost Regulator, Forward
Current Limit vs Temperature
Buck-Boost Regulator, Switch
RDSON vs Temperature
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
2.90
2.85
2.80
2.75
2.70
2.65
2.60
2.55
2.50
2.45
2.40
3.40
3.38
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22
3.20
PWM MODE, LOAD = 500mA
NMOS R , V = 2.7V
DSON IN
V
= 5.5V
IN
V = 2.7V
IN
PMOS R
, V = 2.7V
DSON IN
V
= 3.6V
IN
V
= 3.6V
IN
V
= 2.7V
IN
PMOS R , V = 4.2V
DSON IN
V
= 4.2V
IN
NMOS R , V = 4.2V
DSON IN
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3675 G42
3675 G41
3675 G40
LED Driver, Dual String Efficiency,
10 LEDs per String
LED Driver, Dual String Efficiency,
4 LEDs per String
LED Driver, Forward Current Limit
vs Temperature
100
90
80
70
60
50
40
30
20
10
0
2.10
2.05
2.00
1.95
1.90
1.85
1.80
1.75
1.70
1.65
1.60
100
90
80
70
60
50
40
30
20
10
0
V
= 4.2V
IN
V
= 4.2V
IN
V
= 2.7V
IN
V
IN
= 3.6V
V
= 2.7V
IN
V
= 2.7V
IN
V
IN
= 5.5V
R
= 20kΩ
R
= 20kΩ
LED_FS
LED_FS
1
10
100
1000
–55 –35 –15
5
25 45 65 85 105 125
1
10
100
1000
DAC CODE (DECIMAL)
TEMPERATURE (°C)
DAC CODE (DECIMAL)
3675 G43
3675 G45
3675 G44
LED Driver, LED Current
vs Temperature
High Voltage Boost Regulator,
Efficiency vs Load
Always-On LDO, Load Regulation
100
90
80
70
60
50
40
30
20
10
0
1.220
1.215
1.210
1.205
1.200
1.195
1.190
1.185
1.180
10.25
10.20
10.15
10.10
10.05
10.00
9.95
SINGLE LED STRING CURRENT
MODE0 = MODE1 = 0
V
= 5.5V
IN
V
= 2.7V
IN
V
= 3.6V
IN
V
= 2.7V
IN
V
= 3.6V
V
= 5.5V
IN
IN
V
= 5.5V
IN
V
= 2.7V
IN
V
= 3.6V
IN
9.90
9.85
MODE1 = 1, MODE0 = 0
= 12V
9.80
V
OUT
9.75
1
10
100
1000
0.1
1
10
100
–55 –35 –15
5
25 45 65 85 105 125
LOAD CURRENT (mA)
LOAD CURRENT (mA)
TEMPERATURE (°C)
3675 G47
3675 G48
3675 G46
3675fa
13
LTC3675
PIN FUNCTIONS
EN1 (Pin 1): Buck Regulator 1 Enable Input. Active high.
EN4 (Pin 13): Buck Regulator 4 Enable Input. Active high.
FB1 (Pin 2): Buck Regulator 1 Feedback Pin. Receives
FB4 (Pin 14): Buck Regulator 4 Feedback Pin. Receives
feedbackbyaresistordividerconnectedacrosstheoutput.
feedbackbyaresistordividerconnectedacrosstheoutput.
Connecting FB4 to V combines buck regulator 4 with
IN
FB2 (Pin 3): Buck Regulator 2 Feedback Pin. Receives
buck regulator 3 for higher current.
feedbackbyaresistordividerconnectedacrosstheoutput.
Connecting FB2 to V combines buck regulator 2 with
FB3 (Pin 15): Buck Regulator 3 Feedback Pin. Receives
IN
buck regulator 1 for higher current.
feedbackbyaresistordividerconnectedacrosstheoutput.
Connecting FB3 to V combines buck regulator 3 with
IN
EN2 (Pin 4): Buck Regulator 2 Enable Input. Active high.
buck regulator 2 for higher current.
SW1 (Pin 5): Buck Regulator 1 Switch Node. External
inductor connects to this pin.
LED_OV(Pin16):OvervoltageProtectionPinforLEDDriver.
LED1(Pin17):Connectastringofupto10LEDstothispin.
V (Pin 6): Buck Regulator 1 Input Supply. A 10μF decou-
IN
plingcapacitortoGNDisrecommended.Mustbeconnected
SW7 (Pins 18, 19, 20): LED Driver Switch Node. External
inductor connects to these pins.
to all other V supply pins (Pins 7, 10, 31, 34, 40).
IN
V (Pin 7): Buck Regulator 2 Input Supply. A 10μF decou-
LED2(Pin21):Connectastringofupto10LEDstothispin.
IN
plingcapacitortoGNDisrecommended.Mustbeconnected
CT (Pin 22): Timing Capacitor Pin. A capacitor connected
to GND sets a time constant which is scaled for use by
the WAKE, RSTB and IRQB pins.
to all other V supply pins (Pins 6, 10, 31, 34, 40).
IN
SW2 (Pin 8): Buck Regulator 2 Switch Node. External
inductor connects to this pin.
RSTB (Pin 23): Reset Pin. Open drain output. When the
regulatedoutputvoltageofanyenabledswitchingregulator
is more than 8% below its programmed level, this pin is
SW3 (Pin 9): Buck Regulator 3 Switch Node. External
inductor connects to this pin.
driven LOW. Assertion delay is scaled by the C capacitor.
T
V
(Pin 10): Buck Regulators 3 and 4 Input Supply. A
IN
10μF decoupling capacitor to GND is recommended.
IRQB (Pin 24): Interrupt Pin. Open drain output. When
undervoltage, overtemperature, or an unmasked error
condition is detected, this pin is driven LOW.
Must be connected to all other V supply pins (Pins 6,
7, 31, 34, 40).
IN
SW4 (Pin 11): Buck Regulator 4 Switch Node. External
PBSTAT (Pin 25): Pushbutton Status Pin. Open drain
output. This pin provides a debounced and glitch free
status of the ONB pin.
inductor connects to this pin.
EN3 (Pin 12): Buck Regulator 3 Enable Input. Active high.
3675fa
14
LTC3675
PIN FUNCTIONS
FB5 (Pin 35): Boost Regulator Feedback Pin. Receives
WAKE (Pin 26): Open Drain Output. When the ONB pin
is pressed and released, the signal is debounced and the
WAKE signal is held HIGH for a minimum time period that
feedbackbyaresistordividerconnectedacrosstheoutput.
FB6(Pin36):Buck-BoostRegulatorFeedbackPin.Receives
feedbackbyaresistordividerconnectedacrosstheoutput.
is scaled by the C capacitor.
T
LED_FS (Pin 27): A resistor connected from this pin to
GND programs full-scale LED current.
ENBB (Pin 37): Buck-Boost Regulator Enable Input. Ac-
tive high.
ONB (Pin 28): Pushbutton Input. Active low.
SWAB6 (Pin 38): Buck-Boost Regulator Switch Pin. Ex-
ternal inductor connects to this pin and SWCD6.
LDOFB (Pin 29): LDO Feedback Pin. A resistor divider
from LDO_OUT to GND provides feedback.
2
SCL (Pin 39): Clock Line for I C Port.
LDO_OUT (Pin 30): Output of Always-On LDO. Decouple
V (Pin 40): Buck-Boost Regulator Input Supply. A 10μF
IN
with a 10μF capacitor to GND.
decoupling capacitor to GND is recommended. Must be
connectedtoallotherV supplypins(Pins6,7,10,31,34).
V
(Pin 31): Quiet Input Supply Used to Power Non-
IN
IN
Switching Control Circuitry. A 2.2μF decoupling capacitor
2
DV (Pin 41): Supply Pin for I C Port.
CC
to GND is recommended. Must be connected to all other
V supply pins (Pins 6, 7, 10, 34, 40).
V
(Pins 42): Buck-Boost Regulator Output. Connect
OUT6
IN
a 22μF capacitor to GND.
SW5 (Pin 32): Boost Regulator Switch Node. External
inductor connects to this pin.
2
SDA (Pin 43): Serial Data Line for I C Port. Open drain
output during readback.
V
(Pin 33): Boost Regulator Output. Connect two
OUT5
SWCD6 (Pin 44): Buck-Boost Regulator Switch Pin. Ex-
ternal inductor connects to this pin and SWAB6.
22μF capacitors to GND.
V
(Pin 34): Quiet Input Supply Used to Power Non-
IN
GND (Exposed Pad Pin 45): Ground for Entire Chip. Must
be soldered to PCB for electrical contact and rated thermal
performance.
Switching Control Circuitry. A 2.2μF decoupling capacitor
to GND is recommended. Must be connected to all other
V supply pins (Pins 6, 7, 10, 31, 40).
IN
3675fa
15
LTC3675
BLOCK DIAGRAM
34
33
32
35
V
V
IN
V
IN
OUT5
BOOST REGULATOR
SW5
FB5
V
6
5
2
1
IN
BUCK-BOOST REGULATOR
SW1
FB1
40
42
V
V
IN
BUCK REGULATOR 1
1A
A
D
OUT6
EN1
MODULATION
CONTROL
SWAB6
38
B
MASTER/SLAVE LINES
44 SWCD6
C
V
7
8
3
4
IN
SW2
FB2
FB6
36
BUCK REGULATOR 2
1A
V
REF, CLK
IN
37 ENBB
EN2
17
21
LED1
LED2
SW7
BANDGAP,
OSCILLATOR,
UV, OT
MASTER/SLAVE LINES
MODULATION
CONTROL
18,19,
20
LED_FS
LED_OV
27
16
31
SW3
FB3
9
LED DRIVER
BUCK REGULATOR 3
500mA
15
12
V
IN
V
LDO
–
+
IN
EN3
30 LDO_OUT
MASTER/SLAVE LINES
V
10
IN
LDOFB
29
41
DAC BITS, SLEW CONTROL,
GRADATION, STATUS BITS
DV
CC
TOP LOGIC,
CT OSCILLATOR,
TIMING
2
11
14
13
SW4
FB4
I C
39 SCL
SDA
BUCK REGULATOR 4
500mA
43
EN4
23 RSTB
24 IRQB
25
26
22
28
PBSTAT
WAKE
CT
ONB
GND
45
3675 BD
3675fa
16
LTC3675
OPERATION
The LTC3675 has six monolithic synchronous switching
regulatorsandadualstringboostLEDdriverandisdesigned
to operate from a single Li-Ion battery. All of the switching
regulators and the LED driver are internally compensated
and need only external feedback resistors for regulation.
The switching regulators also offer two operating modes:
Burst Mode operation for higher efficiency at light loads
and pulse-skipping/PWM mode. In Burst Mode operation
at light loads, the output capacitor is charged to a voltage
slightly higher than its regulation point. The regulator then
goesintosleep,duringwhichtheoutputcapacitorprovides
the load current. In sleep most of the regulator’s circuitry
is powered down, helping conserve battery power. When
the output capacitor droops below its programmed value,
thecircuitryispoweredonandanotherburstcyclebegins.
The sleep time decreases as load current increases.
The buck regulators can operate in either of two modes. In
pulse-skippingmode, theregulatorwillskippulsesatlight
loads but will operate at a constant frequency of 2.25MHz
athigherloads. InBurstModeoperation, theregulatorwill
burst at light loads whereas at higher loads it will operate
at constant frequency PWM mode of operation, much the
same as pulse-skipping mode at high load. In shutdown,
2
an I C control bit provides the flexibility to either keep the
SW node in a high impedance state or pull the SW node
to GND through a 10k resistor.
The buck regulators have forward and reverse current
limiting, soft-start to limit inrush current during start-up,
short-circuit protection and slew rate control for lower
radiated EMI.
Each buck regulator may be enabled via its enable pin or
2
I C. The mode of operation, the feedback regulation volt-
2
AllswitchingregulatorsandLEDdrivermaybeconfigured
age and switch slew rate can all be controlled via I C. For
2
via I C, providing the user with the flexibility to operate the
applications that require higher power, buck regulators
may be combined together.
2
LTC3675 in the most efficient manner. I C commands can
2
also be read back via the I C port, to ensure a command
was not corrupted during a transmission.
BUCK REGULATORS WITH COMBINED POWER STAGES
2
All the regulators can be enabled via I C commands. The
Two adjacent buck regulators may be combined in a
master-slave configuration by connecting their SW pins
together and connecting the higher numbered buck’s FB
pintotheinputsupply.Thelowernumberedbuckisalways
the master. In Figure 1, buck regulator 1 is the master. The
feedback network connected to the FB1 pin programs the
buck regulators and the buck-boost regulator may also be
enabledviaenablepins. Theenablepinshavetwodifferent
enablethresholdvoltagesthatdependontheoperatingstate
oftheLTC3675.Withallregulatorsdisabled,theenablepin
threshold is at 650mV. If any regulator is enabled either
2
by its enable pin or an I C command, then the enable pin
thresholds are at 400mV. A precision comparator detects
a voltage greater than 400mV on the enable pin and turns
that regulator on. This precision threshold may be used to
sequentiallyenableregulators.Ifallregulatorsaredisabled,
all the command registers are set in their default state.
V
IN
L1
1.2V
2A
OUT
SW1
V
C
BUCK REGULATOR 1
(MASTER)
OUT
400k
800k
EN1
FB1
There are also 2 bytes of data that report any fault condi-
2
tions on the LTC3675 via I C read back.
V
IN
SW2
BUCK SWITCHING REGULATOR
V
IN
BUCK REGULATOR 2
(SLAVE)
The LTC3675 contains four buck regulators. Two of the
buck regulators are designed to deliver up to 1A load
current each while the other two regulators can deliver
up to 500mA each.
EN2
FB2
3675 F01
Figure 1. Buck Regulators Configured as Master-Slave
3675fa
17
LTC3675
OPERATION
output voltage to 1.2V. The FB2 pin is tied to V , which
The buck-boost regulator can operate in either PWM
mode or in Burst Mode operation. The PWM operating
mode provides a low noise solution. For light loads, Burst
Modeoperationoffersimprovedefficiency.Thebuck-boost
regulator has forward current limiting, soft-start to limit
inrush current during start-up, short-circuit protection
and slew rate control for lower radiated EMI.
IN
configures buck regulator 2 as the slave. The SW1 and
SW2 pins must be tied together. The register contents of
themasterprogramthecombinedbuckregulator’sbehavior
andtheregistercontentsoftheslaveareignored.Theslave
buck control circuitry draws no current. The enable of the
masterbuck(EN1)controlstheoperationofthecombined
bucks, the enable of the slave regulator (EN2) is ignored.
When the output voltage is below 2.65V (typical) during
start-up, Burst Mode operation is disabled and switch D is
turned off. The forward current is carried by the switch D
well diode and there is no reverse current flowing in this
condition. In shutdown, an internal 10k resistor pulls the
output to GND.
Buck regulators 2 and 3 may be configured as combined
buck regulators capable of delivering up to 1.5A load
current with buck regulator 2 being the master. Buck
regulators 3 and 4 may be configured as combined buck
regulators capable of delivering up to 1A load current with
buck regulator 3 being the master.
LED DRIVER
BOOST SWITCHING REGULATOR
The LED driver uses a constant frequency, current mode
boost converter to supply power to up to two strings of 10
series LEDs. The series string of LEDs is connected from
the output of the boost converter to an LED pin. The LED
pin is a programmable constant current sink. The boost
converter will regulate its output to force the LED pin to
300mV. The percentage of full-scale current sunk by the
The boost regulator is capable of delivering up to 1A load
current for a programmed output voltage of up to 5V. The
2
boost regulator may be enabled only via I C. The mode
of operation, feedback regulation voltage and switch slew
2
rate can all be controlled via I C.
The boost regulator can operate in either PWM mode or
in Burst Mode operation. In PWM operating mode, the
regulator operates at a constant frequency of 2.25MHz
and provides a low noise solution. For light loads, Burst
Mode operation offers improved efficiency. The boost
regulator has forward and reverse current limiting, soft-
start to limit inrush current during start-up, short-circuit
protection and slew rate control for lower radiated EMI.
The boost regulator also features true output disconnect
when in shutdown. In shutdown, an internal 10k resistor
pulls the output to GND.
2
LED pin is programmed via I C.
The LED boost converter is designed for very high duty
cycle operation and can boost from below 3V to 40V out
at up to 55mA. The LED boost also features an overvolt-
age protection feature to limit the output voltage in case
of an open circuit in an LED string. The boost converter
will operate in either continuous conduction mode, dis-
continuous conduction mode or pulse-skipping mode
depending on the inductor current required for regulation.
The boost converter may also be configured to operate
2
as an independent high voltage boost regulator via I C.
BUCK-BOOST SWITCHING REGULATOR
The LED driver may also be configured as a single string
LED driver. When driving a single string, LED1 and LED2
should be tied together.
The buck-boost regulator is a 2.25MHz voltage mode
regulator.Thebuck-boostregulatoriscapableofdelivering
up to 1A load current for a programmed output voltage of
3.3V. The regulator can be enabled via its enable pin or via
The LED driver features a fully automatic gradation circuit.
This circuit allows the current to ramp up or down at a
controlledratebetweenanytwocurrentlevels.Onpower-up
the LED DAC register is set to 0. To enable the LED driver
a non-zero value must be programmed into this register.
2
I C. The mode of operation, feedback regulation voltage
2
and switch slew rate can all be controlled via I C.
3675fa
18
LTC3675
OPERATION
All PB timing parameters are scaled using the CT pin.
The gradation circuit will then ramp the current to the
programmed value at a rate determined by the gradation
rate bits. Once the LED driver reaches this value it will
regulate that current until programmed otherwise. If a
new value is programmed in the LED brightness register,
the LED driver’s current will ramp up or down at the pro-
grammed rate until that current is reached. To disable the
LED driver, a code of zero is programmed in the LED DAC
register. The gradation circuit will then ramp the current
down at the programmed rate. Once the current reaches
zero the gradation circuit will disable the boost and the
entire LED driver will enter shutdown mode.
Times described below apply to a nominal C of 0.01μF.
T
The LTC3675 is in an off state when it is powered up with
all regulators in shutdown. The WAKE pin is LOW in the off
state. The WAKE pin will go HIGH either if ONB is pulled
LOW for 400ms or a regulator is enabled via its enable
2
pin or an I C command. The WAKE pin stays in its HIGH
state for 5 seconds and then gets pulled low. WAKE will
not go HIGH again if a second regulator is subsequently
enabled. The LTC3675 is in an on state if either the WAKE
pin is HIGH or a regulator is enabled.
The PBSTAT pin reflects the status of the ONB when
the LTC3675 is in an on state. Once in the on state, the
LTC3675 can be powered down by holding ONB LOW for
at least 5 seconds. All enabled regulators will be turned
off for 1 second and the contents of the program registers
areresettotheirdefaultstate. Thismannerofpower-down
is called a hard reset. A hard reset may also be generated
The LED driver is protected by the LED_OV pin. This pin
acts as a secondary feedback path that limits the voltage
on the output capacitor. A feedback divider is placed from
the LED boost’s output to the LED_OV pin. Values for this
divider are selected to limit the output voltage similarly to
the feedback dividers discussed in “Switching Regulator
OutputVoltageandFeedbackNetwork”intheApplications
Information section. The LED driver begins to transition
to LED_OV control at 800mV and is fully controlled by
the LED_OV pin by 825mV. During this transition the LED
pins will begin to drop out of regulation. For this reason
during normal operation the voltage on this pin should be
kept below 800mV.
2
by using an I C command.
POWER-UP AND POWER-DOWN VIA PUSHBUTTON
The LTC3675 may be turned on and off using the WAKE
pin as shown in Figures 2a and 2b. In Figures 2a and 2b,
pressing ONB low at time t , causes the WAKE pin to go
1
high at time t and stay high for 5 seconds, after which
2
The LED driver is also designed to limit the maximum volt-
age on the LED1 and LED2 pins to no more than 8V. The
boost regulates the minimum voltage on either LED pin.
If one of the LED pins is shorted to ground the boost will
only drive the other LED pin up to the voltage clamp, or
the LED_OV voltage, whichever is lower. If one LED string
is shorted, or partially shorted, this clamp will prevent the
boost from damaging the LED pin.
WAKE is pulled low. WAKE going HIGH at t causes buck
2
regulator 1 to power up, which sequentially powers up
the other buck regulators. The RSTB pin gets pulled HIGH
200ms after the last enabled buck is in its PGOOD state.
An application showing sequential regulator start-up is
shown in the Typical Applications section (Figure 7).
2
If an I C command is written before the 5 second WAKE
period t to keep the buck regulators enabled, the regula-
3
tors stay enabled as shown in Figure 2b. Otherwise, when
PUSHBUTTON INTERFACE AND POWER-UP POWER-
DOWN SEQUENCING
WAKE gets pulled low at t , the buck regulators will also
3
power down sequentially as shown in Figure 2a.
The LTC3675 provides pushbutton functionality to either
power up or power down the part. The ONB, WAKE and
PBSTAT pins provide the user with flexibility to power up
In Figure 2b, ONB is held LOW at instant t for 5 seconds.
4
This causes a hard reset to be generated and at t , all
5
2
regulators are powered down.
or power down the part in addition to having I C control.
3675fa
19
LTC3675
OPERATION
ONB
5 sec
WAKE
(TIED TO EN1)
PBSTAT
(Hi-Z)
SEQUENCE UP
SEQUENCE DOWN
BUCKS 1–4
RSTB
3675 F02a
t
t
2
t
3
(BUCK REGULATOR’S ENABLE IS NOT
2
1
REINFORCED BY I C BEFORE t )
3
Figure 2a. Power-Up Using WAKE (Sequenced Power-Up, Figure 7)
ONB
5 sec
WAKE
PBSTAT
SEQUENCE UP
BUCKS 1–4
RSTB
3675 F02b
t
t
2
t
t
t
5
1
3
4
(BUCK REGULATOR 1 IS
2
ENABLED VIA I C, BEFORE t )
3
Figure 2b. Power-Up Using WAKE and Power-Down Due to Hard Reset (Sequenced Power-Up, Figure 7)
ONB
(Hi-Z)
WAKE
PBSTAT
(Hi-Z)
EN1
BUCK 1
3675 F02c
RSTB
t
t
2
t
3
t
4
1
Figure 2c. Power-Up Using an Enable Pin and Power-Down Due to I2C Generated Hard Reset
3675fa
20
LTC3675
OPERATION
POWER-UP AND POWER-DOWN VIA ENABLE PIN OR I C
2
code of 64h will result in a LED current of 19.6mA and
a full-scale setting of FFh will result in an LED current of
50mA. The 2xFS mode is only intended for use when the
output voltage is below 20V.
WiththeLTC3675initsoffstate,aregulatorcanbeenabled
2
eitherviaitsenablepinorI C.InFigure2c,buckregulator1
is enabled via its enable pin at time t . The WAKE pin goes
1
HIGH for 5 seconds and at t is pulled LOW. The buck
2
2
I C INTERFACE
regulator stays enabled until time t when a hard reset
3
2
command is issued via I C. The buck regulator powers
The LTC3675 may communicate with a bus master using
2
down and stays off for 1 second. At time t , the LTC3675
4
the standard I C 2-wire interface. The timing diagram
exits from the power down state. Since the buck regula-
tor 1 is still enabled via its enable pin, it powers back up.
WAKE also gets pulled HIGH for 5 seconds. The RSTB
pin gets pulled HIGH 200ms after the buck regulator 1 is
in its PGOOD state.
(Figure 3) shows the relationship of the signals on the
bus. The two bus lines, SDA and SCL, must be high when
the bus is not in use. External pull-up resistors or cur-
rent sources, such as the LTC1694 SMBus accelerator,
are required on these lines. The LTC3675 is both a slave
2
receiver and slave transmitter. The I C control signals,
SDA and SCL are scaled internally to the DV supply.
LED CURRENT PROGRAMMING
CC
DV should be connected to the same power supply as
CC
The LED current is primarily controlled through the LED
the bus pull-up resistors.
2
DAC register at I C sub-address 8. This register controls
2
The I C port has an undervoltage lockout on the DV pin.
an 8 bit current DAC. A 20k resistor placed between the
LED_FS pin and ground provides a current reference for
theDACwhichresultsin98μAofprogrammedLEDcurrent
per LSB. For example, programming a LED DAC register
code of 64h will result in a LED current of 9.8mA and a
full-scalesettingofFFhwillresultinaLEDcurrentof25mA.
CC
2
When DV is below 1V, the I C serial port is cleared and
theLTC3675registersaresettotheirdefaultconfigurations.
CC
2
I C Bus Speed
2
The I C port is designed to be operated at speeds of up
to 400kHz. It has built-in timing delays to ensure correct
The 2xFS bit which is bit 3 of the LED configuration reg-
isteratsub-address7effectivelydoublestheprogrammed
LED current. With a 20k resistor from LED_FS to ground
each LSB will be 196μA. Programming a LED DAC register
2
operation when addressed from an I C compliant master
device. It also contains input filters designed to suppress
glitches should the bus become corrupted.
DATA BYTE A
DATA BYTE B
ADDRESS
WR
0
0
0
0
1
1
0
0
0
1
1
A7
A6
A5
A4
A3
A2
6
A1
7
A0
8
B7
1
B6
2
B5
3
B4
B3
B2
6
B1
7
B0
8
START
STOP
SDA
SCL
0
0
0
0
0
8
ACK
9
ACK
9
ACK
9
1
2
3
4
5
6
7
1
2
3
4
5
4
5
SDA
t
t
t
BUF
SU, DAT
SU, STA
t
t
t
t
LOW
HD, STA
SU, STO
HD, DAT
3675 F03
SCL
t
t
t
SP
HD, STA
HIGH
START
CONDITION
REPEATED START
CONDITION
STOP
CONDITION
START
CONDITION
t
r
t
f
Figure 3. I2C Bus Operation
3675fa
21
LTC3675
OPERATION
I C Start and Stop Conditions
2
2
I C Slave Address
A bus master signals the beginning of communications
by transmitting a START condition. A START condition is
generated by transitioning SDA from HIGH to LOW while
SCL is HIGH. The master may transmit either the slave
write or the slave read address. Once data is written to the
LTC3675,themastermaytransmitaSTOPconditionwhich
commands the LTC3675 to act upon its new command
set. A STOP condition is sent by the master by transition-
ing SDA from LOW to HIGH while SCL is HIGH. The bus
The LTC3675 responds to a 7-bit address which has been
factory programmed to b’0001001[R/WB]’. The LSB of
the address byte, known as the read/write bit, should be
0 when writing data to the LTC3675 and 1 when reading
data from it. Considering the address as an 8-bit word,
the write address is 12h and the read address is 13h. The
LTC3675willacknowledgebothitsreadandwriteaddress.
2
I C Sub-Addressed Writing
2
is then free for communication with another I C device.
The LTC3675 has twelve command registers for control
2
input.TheyareaccessedbytheI Cportviaasub-addressed
2
I C Byte Format
writing system.
Each byte sent to or received from the LTC3675 must
be 8 bits long followed by an extra clock cycle for the
acknowledge bit. The data should be sent to the LTC3675
most significant bit (MSB) first.
AsinglewritecycleoftheLTC3675consistsofexactlythree
bytes except when a clear interrupt command is written.
The first byte is always the LTC3675’s write address. The
second byte represents the LTC3675’s sub-address. The
sub-address is a pointer which directs the subsequent
data byte within the LTC3675. The third byte consists of
the data to be written to the location pointed to by the
sub-address. The LTC3675 contains 11 control registers
which can be written to.
2
I C Acknowledge
The acknowledge signal is used for handshaking between
the master and the slave. When the LTC3675 is written
to (write address), it acknowledges its write address as
well as the subsequent two data bytes. When it is read
from (read address), the LTC3675 acknowledges its read
address only. The bus master should acknowledge receipt
of information from the LTC3675.
2
I C Bus Write Operation
The master initiates communication with the LTC3675
with a START condition and the LTC3675’s write address.
If the address matches that of the LTC3675, the LTC3675
returns an acknowledge. The master should then deliver
the sub-address. Again the LTC3675 acknowledges and
the cycle is repeated for the data byte. The data byte is
transferred to an internal holding latch upon the return
of its acknowledge by the LTC3675. This procedure must
be repeated for each sub-address that requires new data.
After one or more cycles of [ADDRESS][SUB-ADDRESS]
[DATA], the master may terminate the communication
with a STOP condition. Multiple sub addresses may be
written to with a single address command using a [AD-
DRESS][SUB-ADDRESS][DATA][SUB-ADDRESS][DATA]
sequence.Alternatively,aREPEAT-STARTconditioncanbe
An acknowledge (active LOW) generated by the LTC3675
letsthemasterknowthatthelatestbyteofinformationwas
received.Theacknowledgerelatedclockpulseisgenerated
by the master. The master releases the SDA line (HIGH)
during the acknowledge clock cycle. The LTC3675 pulls
down the SDA line during the write acknowledge clock
pulse so that it is a stable LOW during the HIGH period
of this clock pulse.
When the LTC3675 is read from, it releases the SDA line
so that the master may acknowledge receipt of the data.
Since the LTC3675 only transmits one byte of data during
a read cycle, a master not acknowledging the data sent
2
by the LTC3675 has no I C specific consequence on the
2
2
initiated by the master and another chip on the I C bus can
operation of the I C port.
be addressed. This cycle can continue indefinitely and the
LTC3675 will remember the last input of valid data that it
3675fa
22
LTC3675
OPERATION
Table 1. Summary of I2C Sub-Addresses and Byte Formats. Bits A7, A6, A5, A4 of Sub-Address Need to Be 0 to Access Registers
SUB-ADDRESS
OPER-
BYTE FORMAT
D7D6D5D4D3D2D1D0
DEFAULT
D7D6D5D4D3D2D1D0 COMMENTS
A7A6A5A4A3A2A1A0 ATION ACTION
0000 0000 (00h)
0000 0001 (01h)
0000 0010 (02h)
0000 0011 (03h)
0000 0100 (04h)
0000 0101 (05h)
0000 0110 (06h)
0000 0111 (07h)
Write No Register
Selected
Used in the Clear Interrupt
Operation.
Read/ Buck1 Register Enable, OUT_Hi-Z, Mode, Slow, DAC[3],
Write DAC[2], DAC[1], DAC[0]
Read/ Buck2 Register Enable, OUT_Hi-Z, Mode, Slow, DAC[3],
Write DAC[2], DAC[1], DAC[0]
Read/ Buck3 Register Enable, OUT_Hi-Z, Mode, Slow, DAC[3],
Write DAC[2], DAC[1], DAC[0]
Read/ Buck4 Register Enable, OUT_Hi-Z, Mode, Slow, DAC[3],
Write
Read/ Boost Register
Write
Read/ Buck-Boost
Write Register
01101111
01101111
01101111
01101111
00001111
00001111
00001111
DAC[2], DAC[1], DAC[0]
Enable, Unused, Mode, Slow, DAC[3],
DAC[2], DAC[1], DAC[0]
Enable, Unused, Mode, Slow, DAC[3],
DAC[2], DAC[1], DAC[0]
Unused, Mode[1], Mode[0], Slow, 2XFS,
GRAD[2], GRAD[1], GRAD[0]
Read/ LED
Write Configuration
Register
0000 1000 (08h)
0000 1001 (09h)
0000 1010 (0Ah)
0000 1011 (0Bh)
0000 1100 (0Ch)
0000 1101 (0Dh)
0000 1111 (0Fh)
Read/ LED DAC
Write Register
Read/ UVOT Register
Write
Read/ RSTB Mask
Write Register
Read/ IRQB Mask
Write Register
Read Status Register UNUSED, UNUSED, PGOOD[6], PGOOD[5],
(Real Time) PGOOD[4], PGOOD[3], PGOOD[2], PGOOD[1]
Read Status Register UV, OT, PGOOD[6], PGOOD[5], PGOOD[4],
(Latched)
Write Clear Interrupt
DAC[7], DAC[6], DAC[5], DAC[4], DAC[3],
DAC[2], DAC[1], DAC[0]
RESET_ALL, UV[2], UV[1], UV[0], UNUSED, 00000000
UNUSED, OT[1], OT[0]
UNUSED, PGOOD[7], PGOOD[6], PGOOD[5], 11111111
PGOOD[4], PGOOD[3], PGOOD[2], PGOOD[1]
UNUSED, PGOOD[7], PGOOD[6], PGOOD[5], 00000000
PGOOD[4], PGOOD[3], PGOOD[2], PGOOD[1]
00000000
00000000 = LED Driver Disabled
11111111 = 25mA per String
Fault will pull RSTB low if the
corresponding bit is ‘1’
Fault will pull IRQB low if the
corresponding bit is ‘1’
Read Back
Read Back
PGOOD[3], PGOOD[2], PGOOD[1]
Clears the Interrupt Bit,
Status Latches are Unlatched
2
received. Once all chips on the bus have been addressed
and sent valid data, a global STOP can be sent and the
LTC3675 will update its command latches with the data
that it had received.
I C Bus Read Operation
The LTC3675 has eleven command registers and two
status registers. The contents of any of these registers
may be read back via I C.
2
It is important to understand that until a STOP signal is
transmitted, data written to the LTC3675 command reg-
isters is not acted on by the LTC3675. Only once a STOP
signal is issued is the data transferred to the command
latchandactedon.Theoneexceptioniswhensub-address
0Fh is written to clear an interrupt. To clear an interrupt,
subaddressOFhmustbewritten, followedbysubaddress
00h. A complete clear interrupt cycle would have the fol-
lowing write sequence: 12h, 0Fh, STOP, 12h, 00h, STOP.
To read the data of a register, that register’s sub-address
must be provided to the LTC3675. The bus master reads
thestatusoftheLTC3675withaSTARTconditionfollowed
by the LTC3675 write address followed by the first data
byte (the sub-address of the register whose data needs
to be read) which is acknowledged by the LTC3675. After
receiving the acknowledge signal from the LTC3675 the
bus master initiates a new START condition followed by
the LTC3675 read address. The LTC3675 acknowledges
the read address and then returns a byte of read back
3675fa
23
LTC3675
OPERATION
RSTB MASK REGISTER
V
IN
EXTERNAL PULL-UP RESISTOR
RSTB
OTHER UNMASKED
PGOOD OUTPUTS
V
OUT
AND1
REGULATOR
UNMASKED
PGOOD OUTPUTS
V
IN
PGOOD
COMPARATOR
EXTERNAL PULL-UP RESISTOR
IRQB
–
+
UNMASKED
ERROR
AND2
92% OF PROGRAMMED V
OUT
SET
CLR
OTHER UNMASKED
ERRORS
CLRINT
LATCHED STATUS REGISTER
REAL TIME STATUS REGISTER
IRQB MASK REGISTER
3675 F04
Figure 4. Simplified Schematic Showing RSTB and IRQB Signal Path
data from the selected register. A STOP command is not
required for the bus read operation.
IfthatPGOODisnotmaskedandstayslowforgreaterthan
50μs, then it pulls the RSTB and IRQB pins low, indicating
to a microprocessor that an error condition has occurred.
The 50μs filter time prevents the pins from being pulled
low due to a transient.
Immediately after writing data to a register, the contents
of that register may be read back if the bus master issues
a START condition followed by the LTC3675 read address.
The LED driver has a PGOOD signal (PGOOD[7]) that
is used to indicate output voltage status only when it is
configured as a high voltage boost regulator. In all other
operating modes, PGOOD[7] is disabled.
ERROR CONDITION REPORTING VIA
RSTB AND IRQB PINS
Error conditions are reported back via the IRQB and RSTB
pins. After an error condition is detected, status data can
be read back to a microprocessor via I C to determine the
exact nature of the error condition.
An error condition that pulls the RSTB pin low is not
latched. When the error condition goes away, the RSTB
pin is released and is pulled high if no other error condi-
tion exists.
2
Figure 4 is a simplified schematic showing the signal path
for reporting errors via the RSTB and IRQB pins.
In addition to the PGOOD signals of the regulators, the
IRQB pin also indicates the status of the overtemperature
and undervoltage flags. The undervoltage and overtem-
perature faults cannot be masked. A fault that causes
the IRQB pin to be pulled low is latched. When the fault
condition is cleared, the IRQB pin is still maintained in its
low state. The user needs to clear the interrupt by using
a CLRINT command.
All the switching regulators and the LED driver have an
internal power good (PGOOD) signal. When the regulated
output voltage of an enabled switcher rises above 93.5%
of its programmed value, the PGOOD signal will transition
high.Whentheregulatedoutputvoltagefallsbelow92.5%
of its programmed value, the PGOOD signal is pulled low.
3675fa
24
LTC3675
OPERATION
Onstart-up,allPGOODoutputsareunmaskedandapower-
on reset will cause RSTB to be pulled low. Once all enabled
regulators have their output PGOOD for 200ms typical
To prevent thermal damage to the LTC3675 and its sur-
rounding components, the LTC3675 incorporates an
overtemperature (OT) function. When the LTC3675 die
temperaturereaches150°Callenabledregulatorsareshut
down and remain in shutdown until the die temperature
falls to 135°C. The LTC3675 also has an overtemperature
warning function which warns a user that the die tempera-
tureisapproachingtheOTthresholdwhichallowstheuser
to take any corrective action. The OT warning threshold is
user programmable as shown in Table 3.
(C = 0.01μF) the RSTB output goes Hi-Z.
T
By masking a PGOOD signal, the RSTB or IRQB pin will
remain Hi-Z even though the output voltage of a regulator
may be below its PGOOD threshold. However, when the
status register is read back, the true condition of PGOOD
is reported.
Table 3. OT Warning Thresholds
OT[1], OT[0]
UNDERVOLTAGE AND OVERTEMPERATURE
FUNCTIONALITY
OT WARNING THRESHOLD
10° Below OT
00 (Default)
The undervoltage (UV) circuit monitors the input supply
voltage and shuts down all enabled regulators if the input
voltage falls below 2.45V. The LTC3675 also provides a
user with an undervoltage warning, which indicates to the
user that the input supply voltage is approaching the UV
threshold. The undervoltage warning threshold is user
programmable as shown in Table 2.
01
10
11
20° Below OT
30° Below OT
40° Below OT
A UV or OT warning is reported to the user when the IRQB
pin is in its high impedance state. The UV and OT warning
flags are not maskable by the user.
RESET_ALLFunctionality:TheRESET_ALLbitshutsdown
all enabled regulators (enabled either via its enable pin or
Table 2. UV Warning Thresholds
UV[2], UV[1], UV[0]
FALLING V WARNING THRESHOLD
IN
2
I C) for 1 second. All command registers are cleared and
000 (Default)
001
2.7V
2.8V
2.9V
3.0V
3.1V
3.2V
3.3V
3.4V
put in their default state.
010
011
100
101
110
111
3675fa
25
LTC3675
APPLICATIONS INFORMATION
Switching Regulator Output Voltage and Feedback
Network
Buck Regulators
All four buck regulators are designed to be used with
2.2μH inductors. Tables 4 and 5 show the recommended
inductors for the 500mA and 1A buck regulators.
The output voltage of the switching regulators is pro-
grammedbyaresistordividerconnectedfromtheswitching
regulator’s output to its feedback pin and is given by V
OUT
The input supply needs to be decoupled with a 10μF
capacitor while the output needs to be decoupled with
a 22μF capacitor for a 1A buck regulator and 10μF for a
500mA buck regulator. Refer to Capacitor Selection in the
Applications Information section for details on selecting
a proper capacitor.
= V (1 + R2/R1) as shown in Figure 5. Typical values for
FB
R1rangefrom40kꢀto1Mꢀ. Thebuckregulatortransient
response may improve with optional capacitor C that
FF
helps cancel the pole created by the feedback resistors
and the input capacitance of the FB pin. Experimentation
with capacitor values between 2pF and 22pF may improve
transient response.
2
EachbuckregulatorcanbeprogrammedviaI C.Toprogram
buckregulator1(1A)usesub-address01h,buckregulator2
(1A) sub-address 02h, buck regulator 3 (500mA) sub-
address 03h and buck regulator4 (500mA) sub-address
04h. The bit format is explained in Table 6.
V
OUT
+
SWITCHING
REGULATOR
C
C
R2
FF
OUT
(BUCK, BOOST,
BUCK-BOOST)
FB
Combined Buck Regulators
(OPTIONAL)
R1
A single 2A buck regulator is available by combining both
1A buck regulators together. Both the 500mA buck regula-
tors may also be combined together to form a 1A buck
regulator.Tables4and7showtherecommendedinductors.
3675 F05
Figure 5. Feedback Components
The input supply needs to be decoupled with a 22μF
capacitor while the output needs to be decoupled with
Table 4. Recommended Inductors for 1A Buck Regulators and Ganged Buck 3, Buck 4 Application
PART NUMBER
L(μH)
MAX I (A)
MAX DCR (mꢀ)
MANUFACTURER
SIZE IN mm (L × W × H)
4 × 4 × 1.8
DC
LPS4018-222
2.2
2.8
3.5
3.2
2.0
70
Coilcraft
www.coilcraft.com
XFL4022-222
LTF5022-2R2
LPS3015-222
2.2
2.2
2.2
21.35
36
Coilcraft
www.coilcraft.com
4 × 4 × 2
5 × 5.2 × 2.2
3 × 3 × 1.5
TDK
www.tdk.com
110
Coilcraft
www.coilcraft.com
Table 5. Recommended Inductors for 500mA Buck Regulators
PART NUMBER
L(μH)
MAX I (A)
MAX DCR (mꢀ)
MANUFACTURER
SIZE IN mm (L × W × H)
3 × 3 × 1.5
DC
LPS3015-222
2.2
2.0
110
Coilcraft
www.coilcraft.com
MLPS3015-2R2
MDT2520-CR2R2
LQM2HPN2R2
2.2
2.2
2.2
1.4
110
90
Maglayers
3 × 3 × 1.5
2.5 × 2 × 1
2.5 × 2 × 1.1
www.maglayers.com
1.35
1.0
Toko
www.toko.com
120
Murata
www.murata.com
3675fa
26
LTC3675
APPLICATIONS INFORMATION
a 47μF capacitor for a 2A combined buck regulator and
22μF for a 1A combined buck regulator. Refer to “Capaci-
tor Selection” in the Applications Information section for
details on selecting a proper capacitor.
The input supply needs to be decoupled with a 10μF
capacitor while the output needs to be decoupled with
two 22μF capacitors. Refer to Capacitor Selection in the
Applications Information section for details on selecting
a proper capacitor.
Boost Regulator
2
The boost regulator can be programmed via I C. To pro-
The boost regulator is designed to be used with a 2.2μH
inductor. Table 8 provides a list of recommended inductors.
gram the boost regulator, use sub-address 05h. The bit
format is explained in Table 9.
Table 6. Buck Regulator Program Register Bit Format
Bit7
Enable
Default is '0' which disables the part. A buck regulator can also be enabled via its enable pin.
2
When enabled via pin, the contents of the I C register program its functionality.
Bit6
OUT_Hi-Z
Default is ‘1’ in which the SW node remains in a high impedance state when the regulator is in shutdown.
A ‘0’ pulls the SW node to GND through a 10k resistor.
Bit5
Bit4
Mode
Default is ‘1’ which is Burst Mode operation. A ‘0’ programs the regulator to operate in pulse-skipping mode.
Slow Edge
This bit controls the slew rate of the switch node. Default is '0' which enables the switch node to slew at a
faster rate, than if the bit were programmed a '1'.
Bit3(DAC3)
Bit2(DAC2)
Bit1(DAC1)
Bit0(DAC0)
DAC Control
These bits are used to program the feedback regulation voltage. Default is '1111' which programs a full-scale
voltage of 800mV. Bits '0000' program the lowest feedback regulation of 425mV. A LSB (DAC0) has a bit
weight of 25mV.
Table 7. Recommended Inductors for 2A Combined Buck Regulator
PART NUMBER
L(μH)
MAX I (A)
MAX DCR (mꢀ)
MANUFACTURER
SIZE IN mm (L × W × H)
4 × 4 × 2
DC
XFL4022-222
2.2
3.5
21.35
Coilcraft
www.coilcraft.com
LPS6225-222
FDV0530-2R2
2.2
2.2
4
45
Coilcraft
6 × 6 × 2.5
www.coilcraft.com
5.3
17.3
Toko
www.toko.com
6.2 × 5.8 × 3
Table 8. Recommended Inductors for Boost Regulator and Buck-Boost Regulator
PART NUMBER
L(μH)
MAX I (A)
MAX DCR (mꢀ)
MANUFACTURER
SIZE IN mm (L × W × H)
4 × 4 × 2
DC
XFL4022-222
2.2
3.5
21.35
Coilcraft
www.coilcraft.com
LTF5022-2R2
2.2
3.2
36
TDK
www.tdk.com
5 × 5.2 × 2.2
Table 9. Boost Regulator Program Register Bit Format
Bit7
Bit6
Bit5
Bit4
Enable
x
Default is ‘0’ which disables the boost.
Unused
Mode
Slow Edge
Mode = 0 is PWM mode, Mode = 1 is Burst Mode operation
This bit controls the slew rate of the switch node. Default is ‘0’ which enables the switch node
to slew at a faster rate than if the bit were programmed a ‘1.’
Bit3(DAC3)
Bit2(DAC2)
Bit1(DAC1)
Bit0(DAC0)
DAC Control
These bits are used to program the feedback regulation voltage. Default is ‘1111’ which
programs a full-scale voltage of 800mV. Bits ‘0000’ program the lowest feedback regulation of
425mV. A LSB (DAC0) has a bit weight of 25mV.
3675fa
27
LTC3675
APPLICATIONS INFORMATION
OptionalcapacitorC isnotneededandmaycompromise
To ensure loop stability, feedback resistor R1 in Figure 5
FF
loop stability.
should be no greater than 105kꢀ. Optional capacitor C
is not needed and may compromise loop stability.
FF
Buck-Boost Regulator
LED Driver
The buck-boost regulator is an internally compensated
voltage mode regulator that is designed to be used with
a 2.2μH inductor. Recommended inductors are listed in
the Table 8.
For proper operation the LED driver boost circuit needs
a 10μH inductor. Recommended inductors are listed in
Table 11.
The input supply needs to be decoupled with a 10μF
capacitor while the output needs to be decoupled with
a 22μF capacitor. Refer to “Capacitor Selection” in the
Applications Information section for details on selecting
a proper capacitor.
TheLEDdriveralsoneedsarectifierdiode.Recommended
schottky diodes are listed in Table 12.
The LED driver has two registers that can be programmed
2
via I C. One of the registers is accessed at sub-address
07h and the bit format is as shown in Table 13.
2
The buck-boost regulator can be programmed via I C. To
The rate at which the gradation circuit ramps the LED cur-
rent is set by GRAD[2:0]. GRAD[2:0] sets the time the LED
driverwilltaketotransitionthroughoneLSBofLEDcurrent.
program the buck-boost regulator, use sub-address 06h.
The bit format is explained in Table 10.
Table 10. Buck-Boost Regulator Program Register Bit Format
Bit7
Enable
Default is ‘0’ which disables the buck-boost. The buck-boost regulator can alternately be enabled via its enable pin.
2
When enabled via pin, the contents of the I C register program its functionality.
Bit6
Bit5
Bit4
x
Unused
Mode
Mode = 0 is PWM mode, Mode = 1 is Burst Mode operation. Default is ‘0.’
Slow edge
This bit controls the slew rate of the switch node. Default is ‘0’ which enables the switch node to slew at a faster rate
than if the bit were programmed a ‘1.’
Bit3(DAC3)
Bit2(DAC2)
Bit1(DAC1)
Bit0(DAC0)
DAC control
These bits are used to program the feedback regulation voltage. Default is ‘1111’ which programs a full-scale voltage of
800mV. Bits ‘0000’ program the lowest feedback regulation of 425mV. A LSB (DAC0) has a bit weight of 25mV.
Table 11. Recommended Inductors for LED Driver
PART NUMBER
L(μH)
MAX I (A)
MAX DCR (mꢀ)
MANUFACTURER
SIZE IN mm (L × W × H)
6 × 6 × 2.5
DC
LPS6225-103M
10
2.1
105
Coilcraft
www.coilcraft.com
IHLP2020BZER10RM01
10
4
184
Vishay
www.vishay.com
5.2 × 5.5 × 2
Table 12. Recommended Schottky Diodes for LED Driver
PART NUMBER
I (A)
F
MANUFACTURER
PD3S140
1.0
1.16
1.0
Diodes Inc.
www.diodes.com
ZLLS1000
Diodes Inc./Zetex
www.diodes.com
CTLSH1-40M322
Central Semiconductor
www.centralsemi.com
3675fa
28
LTC3675
APPLICATIONS INFORMATION
Table 13. LED Driver Regulator Program Register 1 Bit Format
Bit7
x
Unused
Bit6
Bit5
Mode1
Mode0
Mode1 = Mode0 = 0 is default; both LED pins are regulated.
Mode1 = 0 Mode0 = 1; Only LED1 is regulated. (Single string application).
Mode1 = 1 Mode0 = 0; LED driver is configured as a high voltage boost regulator.
Mode1 = Mode0 = 1; Both LED pins are regulated, but boost is not powered up. In this mode an external
voltage is needed to drive the LED’s.
Bit4
Bit3
Slow Edge
This bit controls the slew rate of the switch node. Default is ‘0’ which enables the switch node to slew at a
faster rate than if the bit were programmed a ‘1.’
2xFS
This bit doubles the full-scale programmed LED current. Default is ‘1.’
LED current gradation timing bits. Default is ‘111.’ See Table 14.
Bit2(GRAD2)
Bit1(GRAD1)
Bit0(GRAD0)
DAC Control
These times are shown in Table 14. The default state of
000 in GRAD[2:0] results in a very fast ramp time that
cannot be visually perceived.
To maintain stability, the average inductor current must
be maintained below 750mA. This limits the deliverable
output current at low input supply voltages. Figure 8 gives
an example of the LED driver configured as a high voltage
boost regulator.
Table 14. LED Gradation Bits
GRAD2, GRAD1, GRAD0
GRADATION STEP TIME
0.056 ms
000
Input and Output Decoupling Capacitor Selection
001
0.912 ms
The LTC3675 has multiple input supply pins and output
pins. Each of these pins must be decoupled with low ESR
capacitors to GND. These capacitors must be placed as
closetothepinsaspossible. Ceramicdielectriccapacitors
are a good compromise between high dielectric constant
andstabilityversustemperatureandDCbias.Notethatthe
capacitance of a capacitor deteriorates at higher DC bias.
It is important to consult manufacturer data sheets and
obtain the true capacitance of a capacitor at the DC bias
voltage it will be operated at. For this reason, avoid the
use of Y5V dielectric capacitors. The X5R/X7R dielectric
capacitors offer good overall performance.
010
1.824 ms
011
3.648 ms
100
7.296 ms
101
14.592 ms
29.184 ms
58.368 ms
110
111 (Default)
The LED DAC register is at sub-address 08h. All 8 bits in
this register are used to control LED current. The default
state of this register is 00h which disables the LED driver.
See Table 1.
Operating the LED Driver As a High Voltage Boost
Regulator
The input supply voltage pins 6, 7, 10 and 40 all need
to be decoupled with at least 10μF capacitors. The input
supply pins 31 and 34 and the DVCC pin 41 need to be
decoupled with 2.2μF capacitors. The outputs of the 1A
buck regulators need 22μF capacitors, while the outputs
of the 500mA buck regulators need 10μF capacitors. The
buck-boost output regulator needs a 22μF decoupling
capacitor. The boost regulator needs two 22μF output
decoupling capacitors. The LED driver output pin should
be decoupled with a 4.7μF capacitor.
The LED driver may be configured as a high voltage boost
regulator capable of producing an output voltage up to
40V. The boost mode may be programmed via I C. In
this mode, the LED_OV pin serves as the feedback pin.
The feedback resistors are selected as discussed in the
SwitchingRegulatorOutputvoltageandFeedbackNetwork
section. The LED_FS pins must be tied to the input supply
in this mode. When configured as a high voltage boost,
the LED DAC register is ignored.
2
3675fa
29
LTC3675
APPLICATIONS INFORMATION
Choosing the C Capacitor
T
The C capacitor may be used to program the timing
T
parameters associated with the pushbutton. For a given
C capacitor the timing parameters may be calculated as
T
below. C is in units of μF.
T
t
t
t
t
t
t
= 5000 × C ms
T
ONB_LO
= 5000 × C ms
PBSTAT_PW
ONB_WAKE
T
= 40000 × C ms
T
= 500 × C seconds
WAKE_ON
T
= 500 × C seconds
ONB_HR
T
= 100 × C seconds
HR
T
Programming the UVOT Register
The UV/OT warning byte (default 0000 0000) structure
is as below:
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
RESET_ALL
UV[2]
UV[1]
UV[0]
Unused
Unused
OT[1]
OT[0]
Programming the RSTB and IRQB Mask Registers
The RSTB mask register can be programmed by the user
at sub-address 0Ah and its format is as below.
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
Unused
PGOOD7
PGOOD6
PGOOD5
PGOOD4
PGOOD3
PGOOD2
PGOOD1
If a bit is set to ‘1,’ then the corresponding regulator’s
PGOOD will pull RSTB low if a PGOOD fault were to occur.
The default for this register is FFh.
The IRQB mask register has the same bit format as the
RSTB mask register. The IRQB mask register is located at
sub-address 0Bh and its default contents are 00h.
PGOOD7 is used only when the LED driver is configured
as a high voltage boost regulator.
3675fa
30
LTC3675
APPLICATIONS INFORMATION
Status Byte Read Back
WheneithertheRSTBorIRQBpinispulledlow,itindicates
to the user that a fault condition has occurred. To find out
theexactnatureofthefault,theusercanreadthestatusreg-
isters.Therearetwostatusregisters.Oneregisterprovides
real time fault condition reporting while a second register
latches data when an interrupt has occurred. Figure 4
shows the operation of the real time and latched status
registers. The contents of the latched status register are
cleared when a CLRINT signal is issued. A PGOOD bit is
a ‘0’ if that regulator’s output voltage is more than 8%
below its programmed value.
The sub-address for the real time status register is 0Ch
and its format is as follows:
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
Unused
Unused
PGOOD6
PGOOD5
PGOOD4
PGOOD3
PGOOD2
PGOOD1
The sub-address for the latched status register is 0Dh and
its format is as follows:
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
UV
OT
PGOOD6
PGOOD5
PGOOD4
PGOOD3
PGOOD2
PGOOD1
A write operation cannot be performed to either of the
status registers.
PCB Considerations
When laying out the printed circuit board, the following
list should be followed to ensure proper operation of the
LTC3675:
1. Theexposedpadofthepackage(pin45)shouldconnect
directlytoalargegroundplanetominimizethermaland
electrical impedance.
2. All the input supply pins must be tied together and each
supply pin should have a decoupling capacitor.
3. The switching regulator input supply pins and their re-
spective decoupling capacitors should be kept as short
as possible. The GND side of these capacitors should
3675fa
31
LTC3675
connect directly to the ground plane of the part. These
capacitors provide the AC current to the internal power
MOSFETs and their drivers. It’s important to minimize
and LED_OV node should be kept far away or shielded
from the switching nodes or poor performance could
result.
inductance from these capacitors to the V pins of the
IN
5. The GND side of the switching regulator output capaci-
torsshouldconnectdirectlytothethermalgroundplane
of the part. Minimize the trace length from the output
capacitor to the inductor(s)/pin(s).
LTC3675.
4. The switching power traces connecting SW1, SW2,
SW3, SW4, SW5, SWAB6, SWCD6 and SW7 to their
respective inductors should be minimized to reduce
radiated EMI and parasitic coupling. Due to the large
voltage swing of the switching nodes, high input im-
pedance sensitive nodes such as the feedback nodes
6. Inacombinedbuckregulatorapplicationthetracelength
of switch nodes to the inductor must be kept equal to
ensure proper operation.
3675fa
32
LTC3675
TYPICAL APPLICATIONS
Li-Ion
CELL
2.7V
V
V
IN
IN
TO 4.2V
10μF
2.2μF
2.2μH
1.2V
1A
1.2V
25mA
LDO_OUT
LDOFB
SW1
FB1
10μF
22μF
22μF
10μF
324k
649k
324k
649k
V
V
IN
IN
10μF
10μF
2.2μH
2.5V
1A
2.2μH
SW2
FB2
SW5
VOUT5
655k
309k
5V, 1A
22μF
22μF
22μF
1.05M
200k
FB5
LTC3675
V
IN
2.2μH
10μF
2.2μH
2.2μH
SWAB6
SWCD6
VOUT6
1.8V
500mA
SW3
FB3
590k
475k
3.3V, 1A
10μF
322k
105k
FB6
1.6V
SW4
FB4
500mA
DV
CC
10μF
10μF
511k
511k
1μF
2
I C
CONTROL
SCL
SDA
10μH
IRQB
RSTB
WAKE
PBSTAT
EN1
SW7
4.7μF
50V
MICROPROCESSOR
CONTROL
EN2
EN3
UP TO
10 LEDS
t
t
t
t
t
t
EN4
EN6
CT
LED1
LED2
1.96M
42.2k
0.01μF
LED_OV
LED_FS
ONB
EXPOSED PAD
PUSH BUTTON
20k
3675 F06
Figure 6. Detailed Front Page Application Circuit
3675fa
33
LTC3675
TYPICAL APPLICATIONS
Li-Ion CELL
2.7V TO 4.2V
V
V
IN
IN
2.2μF
10μF
2.2μH
1.2V
1A
1.2V
25mA
LDO_OUT
LDOFB
SW1
FB1
10μF
22μF
324k
649k
324k
649k
V
V
IN
IN
10μF
10μF
2.2μH
2.5V
1A
2.2μH
SW2
FB2
SW5
22μF
655k
309k
VOUT5
5V, 1A
22μF
22μF
22μF
1.05M
200k
FB5
LTC3675
V
IN
2.2μH
10μF
2.2μH
2.2μH
SWAB6
SWCD6
VOUT6
1.8V
SW3
FB3
500mA
590k
475k
3.3V, 1A
10μF
332k
105k
10μF
1μF
FB6
1.6V
500mA
SW4
FB4
DV
CC
10μF
10μF
511k
511k
2
I C
CONTROL
SCL
SDA
IRQB
RSTB
WAKE
PBSTAT
EN1
10μH
SW7
4.7μF
50V
MICROPROCESSOR
CONTROL
EN2
EN3
EN4
ENBB
CT
UP TO
10 LEDS
t
t
t
LED1
LED2
1.96M
42.2k
0.01μF
LED_OV
LED_FS
ONB
EXPOSED PAD
PUSH BUTTON
20k
3675 F07
Figure 7. Buck Regulators with Sequenced Start-Up and a Single String of LEDs.
Buck Regulators Power-Up in the Sequence Buck1, Buck2 and Buck3
3675fa
34
LTC3675
TYPICAL APPLICATIONS
Li-Ion
CELL
2.7V
V
IN
V
IN
TO 4.2V
2.2μF
10μF
1.2V
25mA
LDO_OUT
LDOFB
2.2μH
10μF
324k
649k
2.5V
2A
SW1
SW2
FB1
22μF
22μF
655k
309k
V
IN
10μF
2.2μH
V
IN
SW5
VOUT5
10μF
5V, 1A
FB2
22μF
22μF
22μF
1.05M
200k
FB5
V
IN
LTC3675
10μF
22μF
2.2μH
2.2μH
SWAB6
SWCD6
VOUT6
1.2V
1A
SW3
3.3V, 1A
10μF
1μF
332k
105k
324k
SW4
FB3
FB6
649k
DV
CC
2
I C
FB4
CONTROL
SCL
SDA
LED_FS
10μF
10μH
IRQB
RSTB
WAKE
PBSTAT
EN1
12V
SW7
150mA
MICROPROCESSOR
CONTROL
10μF
20V
EN2
EN3
EN4
1.87M
ENBB
CT
LED_OV
LED1
LED2
0.01μF
133k
ONB
EXPOSED PAD
PUSH BUTTON
3675 F08
Figure 8. Combined Buck Regulators and a High Voltage Boost Regulator
3675fa
35
LTC3675
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
UFFMA Package
44-Lead Plastic QFN (4mm × 7mm)
(Reference LTC DWG # 05-08-1762 Rev A)
1.48 0.05
0.70 0.05
1.70 0.05
2.56 0.05
4.50 0.05
3.10 0.05
2.40 REF
2.02 0.05
2.76 0.05
0.98 0.05
2.64 0.05
PACKAGE
OUTLINE
0.20 0.05
5.60 REF
0.40 BSC
6.10 0.05
7.50 0.05
RECOMMENDED SOLDER PAD LAYOUT
PIN 1 NOTCH
R = 0.30 TYP
OR 0.35 s 45o
CHAMFER
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.75 p0.05
2.40 REF
4.00 p0.10
43
44
0.00 – 0.05
0.40 p0.10
1
2
PIN 1
TOP MARK
(SEE NOTE 6)
2.64
0.10
2.56
0.10
7.00 p0.10
5.60 REF
R = 0.10
TYP
1.70
0.10
2.76
0.10
0.74 0.10
R = 0.10 TYP
0.74 0.10
(UFF44MA) QFN REV A 0410
R = 0.10 TYP
0.200 REF
0.20 p0.05
0.40 BSC
0.98 0.10
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
3. ALL DIMENSIONS ARE IN MILLIMETERS
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3675fa
36
LTC3675
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
4/12
Clarified PGood Threshold Voltage spec, added Min/Max
Clarified Note 2, electrical grades and temperatures
Modified pin function descriptions for RSTB and IRQB
4
7
14
2
Changed figure reference in I C Interface section
21
Modified PGood Comparator Polarity Figure 4
24
Modified Programming the RSTB and IRQB Mask Registers section
Modified Status Byte Read Back section
30
31
Modified application circuit V caps
33, 34, 35, 38
IN
3675fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
37
LTC3675
TYPICAL APPLICATION
Li-Ion
CELL
2.7V
V
IN
V
IN
TO 4.2V
10μF
10μF
10μF
2.2μF
2.2μH
1.2V
1A
1.2V
25mA
LDO_OUT
LDOFB
SW1
FB1
10μF
22μF
22μF
10μF
324k
649k
324k
649k
V
IN
V
IN
10μF
2.2μH
2.5V
1A
2.2μH
SW2
FB2
SW5
VOUT5
655k
309k
5V, 1A
22μF
22μF
22μF
1.05M
200k
FB5
LTC3675
V
IN
2.2μH
2.2μH
2.2μH
SWAB6
SWCD6
VOUT6
1.8V
500mA
SW3
FB3
590k
475k
3.3V, 1A
10μF
332k
105k
FB6
1.6V
500mA
SW4
FB4
DV
CC
10μF
10μF
511k
511k
1μF
2
I C
CONTROL
SCL
SDA
10μH
IRQB
RSTB
WAKE
PBSTAT
EN1
SW7
4.7μF
50V
MICROPROCESSOR
CONTROL
EN2
EN3
UP TO
10 LEDS
t
t
t
t
t
t
EN4
EN6
CT
LED1
LED2
1.96M
42.2k
0.01μF
LED_OV
LED_FS
ONB
EXPOSED PAD
PUSH BUTTON
20k
3675 TA02
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
Triple, Synchronous, 100% Duty Cycle, PGOOD Pin, Programmable V Servo Voltage
LTC3569
Triple Buck Regulator with 1.2A and
Two 600mA Outputs and Individual
Programmable References
FB
LTC3577/
Highly Integrated Portable/Navigation PMIC PMIC: Linear Power Manager and Three Buck Regulators, 10-LED Boost Regulator,
2
LTC3577-1/
LTC3577-3/
LTC3577-4
Synchronous Bucks ADJ at 800mA/500mA/500mA, PB Control, I C Interface, 2× 150mA
LDOs, OVP Charge Current Programmable Up to 1.5A from Wall Adapter Input, Thermal
Regulation, 4mm × 7mm QFN-44 Package; "-1" and "-4" Versions Have 4.1V V
, "-3"
FLOAT
Version for SiRF Atlas IV Processors
LTC3586/
LTC3586-1
Switching USB Power Manager with Li-Ion/ PMIC: Switching Power Manager, 1A Buck-Boost + 2 Bucks ADJ to 0.8V at
Polymer Charger, 1A Buck-Boost + Dual
Sync Buck Converter + Boost + LDO
400mA/400mA + 800mA Boost + LDO, Charge Current Programmable Up to 1.5A from
Wall Adapter Input, 4mm × 6mm QFN-38 Package; "-1" Version Has 4.1V V
FLOAT
3675fa
LT 0412 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
38
●
●
© LINEAR TECHNOLOGY CORPORATION 2010
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明